SMTS Engineer Job Listing at AMD in Bengaluru, KA (Job ID 49074-en-us)

Description

THE ROLE: 

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD's High-performance DDR IPs, resulting in no bugs in the final design.  

THE PERSON:  

You have a passion for modern, complex architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

KEY RESPONSIBILITIES:  

• Collaborate with architects for the new features to be implemented in layout
• End-to-end RTL to GDS implementation of complex IPs and supporting the SOC customers
• Working with RTL team to resolve timing and congestion issues
• Build and develop methodology to converge multiple PNR blocks from RTL to GDS
• Analyze design metrics and make implementation choices to optimize PPA

PREFERRED EXPERIENCE:  

• ASIC design flow and direct experience with ASIC design in sub-7nm technology nodes
• Circuit timing/STA, and practical experience with Prime Time or equivalent tools
• Low power digital design and analysis
• Expertise in synthesis and physical design flows
• Modern SOC tools including Synopsys Fusion compiler, Primetime and Redhawk
• TCL, Perl, Python scripting
• Strong verbal and written communication skills
• Ability to organize and present complex technical information
• Fluent in working with Linux environment
• Mimimum 10 years of industry experience in PD flows/tools.

ACADEMIC CREDENTIALS:  

• Bachelors or Masters degree in computer engineering/Electrical Engineering 
• #LI-SR5