What you do at AMD changes everything
At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center.
Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
Member of Technical Staff Design Verification Engineer
We, VCN (Video Codec Next) IP team is based in Markham, ON, Canada. We focus on video codec IP development for AMD SOCs with leading ASIC technology. We are looking for self-motivated, MTS level ASIC design verification engineer located in GTA area to join the verification team to develop world class video solutions.
You are required to proactively reach out to different functional team members to understand the design requirement and drive block level verification, IP level bring-up and verification, code coverage and functional coverage closure throughout the design cycle. Solid technical skill, self-driven attitude, and excellent communication skill especially remotely are key factors to make you successful in this organization.
- Draft block level test plan and functional coverage specification.
- Construct block level test bench in UVM.
- Drive and implement block level tests. Manage sanity suite and regression suite with throughput and coverage trade-offs.
- Triage failures and provide support to design engineers to isolate the problems.
- Actively drive simulation throughput profiling to use latest simulation technology to shorten the regression turnaround time.
- Own verification of the design in different views, including C-model simulation, RTL simulation and formal verification.
- Ensure design can meet performance target with accurate modeling of BFM/UVC behavior in the block level test bench to be aligned with IP level behavior with top down constraints.
- Drive and own code coverage report, coverage profiling, coverage review and add new tests for coverage improvement.
- Drive and own functional coverage implementation, coverage report, coverage review and add new tests for coverage improvement.
- Drive IP level feature bring-up associated with the block and assist design or verification lead to isolate the problem at IP level simulation environment.
- At least 7 years of solid ASIC/FPGA design verification experience.
- Rich knowledge about ASIC design flow from specification, implementation, to verification.
- Expert in UVM.
- Strong in SystemC, C++/C programming.
- Solid knowledge in RTL design in Verilog.
- Experience using HLS methodology in complex design implementation and verification is a definite asset
- Familiar with CAD tools of simulation, coverage report and profiling.
- Handy in Linux script languages such as Perl, Python, Ruby or/and shell languages.
- Solid problem solving skill.
- Prior team, technical leadership or mentorship are great value added asset
- Good team player and communicator
- Basic video codec knowledge is definitely a plus.
Min. Bachelor of Science Degree in Electrical Engineering, Computer Science, or Computer Engineering.
Requisition Number: 101323
Country: Canada Province: Ontario City: Markham
AMD is an inclusive employer dedicated to building a diverse workforce. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective provincial human rights codes throughout all stages of the recruitment and selection process. Any applicant who requires accommodation should contact AskHR@amd.com.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services.
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