Description
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
STAFF/SENIOR STAFF SYNTHESIS/TIMING ENGINEER CORK/DUBLIN
THE ROLE:
This is an exciting opportunity to join the innovative and multi-award winning team that has developed the RF data converter sub-system, including direct-RF digital signal processing, around which Zynq® Ultrascale+™ RFSoC is built. As part of the Analog and Digital-RF design group you will help to develop a wide range of ultra challenging, high instance count (1-5M), high speed (>1G), high utilization, low power digital IPs as part of a highly collaborative mixed-signal team using the latest FinFET CMOS processes.
This is a leadership role within the team. The package will be both comprehensive and extremely competitive.
KEY RESPONSIBLITIES:
Synthesis flow development and delivery
STA development and signoff
Physical implementation waiver development and signoff
Interfacing to front end, place & route, DFx, verification, CAD, and silicon validation teams to discuss and resolve timing, power, coverage, silicon, and other issues
Timing constraint development and maintenance
Interacting with analog team to define analog/digital interfaces and specification
Mentoring and supervision of other team members, including regular knowledge sharing
PREFERRED EXPERIENCE:
Extensive knowledge of physical, synthesis and static timing considerations such as timing constraints and implementation for low power, high speed and minimum area
Experience collaborating with front end, place & route, DFx, verification, CAD and silicon validation teams
Understanding of RTL to GDSII flows, including BEQ, Constraints Validation, DFx insertion, Timing ECO, Power Analysis, and EMIR
Understanding of timing library characterizations, static timing margining and SPICE simulations
Intertest in evaluating, developing and adopting AI, complex UPF and other next generation initiatives in design flows and methodologies
A proactive, and highly collaborative approach to problem solving
A strong record of continuous improvement, including the use of TCL, Perl/Python and shell scripting
A strong record of collaboration and knowledge sharing
Experience using ultra advanced technology nodes
Experience with Vivado, Virtuoso, SPICE, Liberate AMS, and gate level simulations
Experience of working in mixed-signal designs and interfacing between analog and digital domains
ACADEMIC CREDENTIALS:
Bachelors or Masters degree in computer engineering/Electrical Engineering with at least 5 years' industry experience in strongly related roles
#LI-PL1
#LI-Hybrid
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
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